Micrel, Inc.

MIC3003GFL

July 2010

6

M9999-072910-A

List of Figures

Figure 1. MIC3003 Block Diagram.................................................................................................................................... 18

Figure 2. Analog-to-Digital Converter Block Diagram....................................................................................................... 18

Figure 3. Internal Calibration RX Power Linear Approximation ........................................................................................ 25

Figure 4. RXPOT Block Diagram ...................................................................................................................................... 25

Figure 5. APC and Modulation Control Block Diagram.................................................................................................... 26

Figure 6. Programmable Feedback Resistor .................................................................................................................... 26

Figure 7. Transmitter Configurations Supported by MIC3003 ......................................................................................... 26

Figure 9. MIC3003 Power-On Timing (OE = 1) ................................................................................................................ 28

Figure 10. Fault Comparator Logic ................................................................................................................................... 28

Figure 11. Saturation Detector .......................................................................................................................................... 29

Figure 12. RXLOS Comparator Logic ............................................................................................................................... 29

Figure 14. Transmitter On-Off Timing .............................................................................................................................. 34

Figure 15. Initialization Timing with TXDISABLE Asserted.............................................................................................. 34

Figure 16. Initialization Timing with TXDISABLE Not Asserted ...................................................................................... 34

Figure 17. Loss-of-Signal (LOS) Timing .......................................................................................................................... 35

Figure 19. Successfully Clearing a Fault Condition ......................................................................................................... 36

Figure 20. Unsuccessful Attempt to Clear a Fault ........................................................................................................... 36

Figure 21. Write Byte Protocol ......................................................................................................................................... 38

Figure 22. Read Byte Protocol......................................................................................................................................... 38

Figure 23. Read_Word Protocol....................................................................................................................................... 38

Figure 24. Eight-Byte Block Write Protocol...................................................................................................................... 39