SSL4101T datasheet(5/29 Pages) NXP

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SSL4101T

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Product data sheet

Rev. 1 — 21 April 2011

5 of 29

NXP Semiconductors

SSL4101T

GreenChip III+ SMPS control IC

Functional description

7.1 General control

The SSL4101T contains a controller for a power factor correction circuit as well as a

controller for a flyback circuit. A typical configuration is shown in Figure 3.

7.1.1 Start-up and UnderVoltage LockOut (UVLO)

Initially the capacitor on the VCC pin is charged from the high voltage mains via the HV pin.

As long as VCC is below Vtrip, the charge current is low. This protects the IC if the VCC pin

is shorted to ground. For a short start-up time the charge current above Vtrip is increased

until VCC reaches Vth(UVLO). If VCC is between Vth(UVLO) and Vstartup, the charge current is

low again, ensuring a low duty cycle during fault conditions.

The control logic activates the internal circuitry and switches off the HV charge current

when the voltage on pin VCC passes the Vstartup level. First, the LATCH pin current source

is activated and the soft start capacitors on the PFCSENSE and FBSENSE pins are

charged. When the LATCH pin voltage exceeds the Ven(LATCH) voltage and the soft start

capacitor on the PFCSENSE pin is charged, the PFC circuit is activated. Also the flyback

converter is activated (providing the soft start capacitor on the FBSENSE pin is charged).

The output voltage of the flyback converter is then regulated to its nominal output voltage.

The IC supply is taken over by the auxiliary winding of the flyback converter. See Figure 4.

If during start-up the LATCH pin does not reach the Ven(LATCH) level before VCC reaches

Vth(UVLO), the LATCH pin output is deactivated and the charge current is switched on

again.

Fig 3.

Typical configuration

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SSL4101T

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