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SSL4101T 데이터시트(PDF) 7 Page - NXP Semiconductors |
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SSL4101T 데이터시트(HTML) 7 Page - NXP Semiconductors |
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7 / 29 page ![]() SSL4101T All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 — 21 April 2011 7 of 29 NXP Semiconductors SSL4101T GreenChip III+ SMPS control IC 7.1.2 Supply management All internal reference voltages are derived from a temperature compensated and trimmed on-chip band gap circuit. Internal reference currents are derived from a temperature compensated and trimmed on-chip current reference circuit. 7.1.3 Latch input Pin LATCH is a general purpose input pin, which can be used to switch off both converters. The pin sources a current IO(LATCH) (80 μA typical). Switching off both converters is stopped as soon as the voltage on this pin drops below 1.25 V. At initial start-up the switching is inhibited until the capacitor on the LATCH pin is charged above 1.35 V (typical). No internal filtering is done on this pin. An internal Zener clamp of 2.9 V (typical) protects this pin from excessive voltages. Fig 4. Start-up sequence, normal operation and restart sequence VCC LATCH PROTECTION PFCSENSE PFCDRIVER FBSENSE FBDRIVER FBCTRL VOSENSE VO charging VCC capacitor starting converters normal operation protection restart soft start soft start IHV Vstart(VINSENSE) Vto(FBCTRL) Vstartup Vth(UVLO) Vtrip VEN(LATCH) Vstart(fb) VINSENSE 014aaa156 |
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