| 전자부품 데이터시트 검색엔진 |
|
MPC5644B 데이터시트(PDF) 84 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
MPC5644B 데이터시트(HTML) 84 Page - Freescale Semiconductor, Inc |
|
84 / 114 page ![]() MPC5646C Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice Freescale Semiconductor 84 Figure 22. MII transmit signal timing diagram 4.18.3 MII Async Inputs Signal Timing (CRS and COL) Figure 23. MII async inputs timing diagram 4.18.4 MII Serial Management Channel Timing (MDIO and MDC) The FEC functions correctly with a maximum MDC frequency of 2.5 MHz. Table 46. MII Async Inputs Signal Timing1 1 Output pads configured with SRE = 0b11. Spec Characteristic Min Max Unit M9 CRS, COL minimum pulse width 1.5 — TX_CLK period Table 47. MII serial management channel timing1 Spec Characteristic Min Max Unit M10 MDC falling edge to MDIO output invalid (minimum propagation delay) 0— ns M11 MDC falling edge to MDIO output valid (max prop delay) —25 ns M12 MDIO (input) to MDC rising edge setup 28 — ns M13 MDIO (input) to MDC rising edge hold 0— ns M6 TX_CLK (input) TXD[3:0] (outputs) TX_EN TX_ER M5 M7 M8 CRS, COL M9 |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |