PCF8564A_10 datasheet(33/45 Pages) NXP

33 / 45 page

PCF8564A

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Product data sheet

Rev. 02 — 30 September 2010

33 of 45

NXP Semiconductors

PCF8564A

Real time clock and calendar

17. Handling information

All input and output pins are protected against ElectroStatic Discharge (ESD) under

normal handling. When handling Metal-Oxide Semiconductor (MOS) devices ensure that

all normal precautions are taken as described in JESD625-A, IEC 61340-5 or equivalent

standards.

Table 32.

Solder bump description for all PCF8564ACX types

All x/y coordinates represent the position of the center of each bump with respect to the center

(x/y = 0) of the chip; see Figure 28.

Symbol

Bump

X (

μm)

Y (

μm)

Description

OSCI

−368

738

oscillator input

OSCO

−368

188

oscillator output

INT

−368

−262

open-drain interrupt output (active LOW)

VSS

−368

−712

ground (substrate)

SDA

362

−712

serial data I/O

SCL

362

−262

serial clock input

CLKOUT

362

188

CMOS push-pull clock output

VDD

456

supply

CLKOE

362

738

CLKOUT output enable

Fig 29. Alignment marks of all PCF8564A types

Table 33.

Alignment marks of all PCF8564A types

All x/y coordinates represent the position of the REF point (see Figure 29) with respect to the center

(x/y = 0) of the chip; see Figure 27 and Figure 28.

Alignment markers

Size (

μm)

X (

μm)

Y (

μm)

100

× 100

465.2

−826.3

100

× 100

−523.0

890.0

× 117

−569.9

−885.5

REF

013aaa036

REF

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