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GS7025 데이터시트(PDF) 1 Page - Gennum Corporation

부품명 GS7025
상세설명  PRO-LINX Serial Digital Receiver
PDF  23 Pages
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제조업체  GENNUM [Gennum Corporation]
홈페이지  http://www.gennum.com
Logo GENNUM - Gennum Corporation

GS7025 데이터시트(HTML) 1 Page - Gennum Corporation

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GS7025 PRO-LINX™ Serial Digital Receiver
Data Sheet
13813 - 7
October 2009
GS7025 PRO-LINX™ Serial Digital Receiver
www.gennum.com
Key Features
• SMPTE 259M-C compliant (270Mb/s)
• Automatic cable equalization (typically greater than
350m of high-quality cable)
• Serial data outputs muted and serial clock remains
active when input data is lost
• Operation independent of SAV/EAV sync signals
• Signal strength indicator output
• Carrier detect with programmable threshold level
• Power savings mode (output serial clock disable)
• Large IJT, typically 0.56UI beyond loop bandwidth
•Robust lock detect
Applications
Cable equalization plus clock and data recovery for all high
speed serial digital interface applications involving SMPTE
259M-C.
Description
The GS7025 provides automatic cable equalization and
high-performance clock and data recovery for serial digital
signals. The GS7025 receives either single-ended or
differential serial digital data and outputs differential clock
and retimed data signals at PECL levels (800mV). The
onboard cable equalizer provides up to 35dB of gain at
135MHz, which typically results in equalization of greater
than 350m of high-quality cable at 270Mb/s.
The GS7025 requires only one external resistor to set the
VCO centre frequency and provides adjustment free
operation.
The GS7025 has dedicated pins to indicate signal strength,
carrier detect, and LOCK. Optional external resistors allow
the carrier detect threshold level to be customized to the
user's requirement. In addition, the GS7025 provides an
'Output Eye Monitor Test' (OEM_TEST) for diagnostic
testing of signal integrity after equalization, prior to
re-slicing. The serial clock outputs can be disabled to
reduce power. The GS7025 operates from a single +5V or
-5V supply.
GS7025 Functional Block Diagram
LF+ LFS LF-
CBG
RVCO
CARRIER DETECT
PHASELOCK
HARMONIC
FREQUENCY
ACQUISITION
VCO
LOCK
SDO
SDO
CLK_EN
SCO
SCO
MUTE
COSC
PHASE
DETECTOR
LOGIC
+
-
SDI
SDI
OEM_TEST
AGC CAP CD_ADJ
AUTO EQ
CONTROL
EYE
MONITOR
VARIABLE
GAIN EQ
STAGE
CHARGE
PUMP
+
-
+
-
SSI/CD
A/D
ANALOG
DIGITAL
MUX
DDI
DDI


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