74LVC1G00

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© NXP B.V. 2011. All rights reserved.

Product data sheet

Rev. 9 — 7 December 2011

3 of 17

NXP Semiconductors

74LVC1G00

Single 2-input NAND gate

6.

Pinning information

6.1 Pinning

6.2 Pin description

7.

Functional description

[1]

H = HIGH voltage level; L = LOW voltage level.

Fig 4.

Pin configuration

SOT353-1 and SOT753

Fig 5.

Pin configuration SOT886

Fig 6.

Pin configuration SOT891,

SOT1115 and SOT1202

74LVC1G00

A

GND

Y

001aab608

1

2

3

5

4

74LVC1G00

A

001aab603

B

GND

n.c.

Y

Transparent top view

2

3

1

5

4

6

74LVC1G00

A

001aaf051

B

GND

n.c.

Y

Transparent top view

2

3

1

5

4

6

Table 3.

Pin description

Symbol

Pin

Description

SOT353-1, SOT753 SOT886, SOT891, SOT1115 and SOT1202

B

1

1

data input

A

2

2

data input

GND

3

3

ground (0 V)

Y

4

4

data output

n.c.

-

5

not connected

5

6

supply voltage

Table 4.

Function table[1]

Inputs

Outputs

A

B

Y

LLH

LH

H

HL

H

HHL