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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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AFS090 데이터시트(PDF) 41 Page - Microsemi Corporation |
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AFS090 데이터시트(HTML) 41 Page - Microsemi Corporation |
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41 / 334 page  Fusion Family of Mixed Signal FPGAs R e visio n 2 2 - 25 Global Buffers with No Programmable Delays The CLKBUF and CLKBUF_LVPECL/LVDS macros are composite macros that include an I/O macro driving a global buffer, hardwired together (Figure 2-20). The CLKINT macro provides a global buffer function driven by the FPGA core. The CLKBUF, CLKBUF_LVPECL/LVDS, and CLKINT macros are pass-through clock sources and do not use the PLL or provide any programmable delay functionality. Many specific CLKBUF macros support the wide variety of single-ended and differential I/O standards supported by Fusion devices. The available CLKBUF macros are described in the IGLOO, ProASIC3, SmartFusion and Fusion Macro Library Guide . Figure 2-20 • Global Buffers with No Programmable Delay CLKBUF_LVDS/LVPECL Macro PADN PADP YY A PAD Y CLKINT Macro CLKBUF Macro GLA or GLB or GLC Clock Source Clock Conditioning Output None |
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