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06XS3517 데이터시트(PDF) 13 Page - Freescale Semiconductor, Inc |
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06XS3517 데이터시트(HTML) 13 Page - Freescale Semiconductor, Inc |
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13 / 41 page ![]() Analog Integrated Circuit Device Data Freescale Semiconductor 13 06XS3517 ELECTRICAL CHARACTERISTICS DYNAMIC ELECTRICAL CHARACTERISTICS DYNAMIC ELECTRICAL CHARACTERISTICS Table 4. Dynamic Electrical Characteristics Characteristics noted under conditions 3.0 V V CC 5.5 V, 7.0 V VBAT 20 V, - 40 C T A 125 C, GND = 0 V, unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25 °C under nominal conditions, unless otherwise noted. Characteristic Symbol Min Typ Max Unit POWER OUTPUTS TIMING (OUT1 TO OUT5) Current Sense Valid Time (valid for resistive loads only),(37) SR bit = 0 SR bit = 1 tCSNS(VAL) 0 0 100 50 200 100 s Current Sense Settling Time on Resistive Load Only(37) tCSNS(SET) – 10 30 s Current Sense Synchronization signal - typical validation time SR bit = 0 SR bit = 1 tSYNC(val) 0 0 90 45 180 90 Driver Output Positive Slew Rate (30% to 70% @ VBAT = 14 V) SR bit = 0 IOUT = 2.8 A for OUT1 and OUT5 IOUT = 5.5 A for OUT2, OUT3, and OUT4 SR bit = 1 IOUT =0.7 A for OUT1 and OUT5 IOUT = 1.4 A for OUT2, OUT3, and OUT4 SRR 0.14 0.2 0.28 0.4 0.4 0.4 0.8 0.8 0.8 0.8 1.6 1.6 V/ s Driver Output Negative Slew Rate (70% to 30% @ VBAT = 14 V) SR bit = 0 IOUT = 2.8 A for OUT1 and OUT5 IOUT = 5.5 A for OUT2, OUT3, and OUT4 SR bit = 1 IOUT = 0.7 A for OUT1 and OUT5 IOUT = 1.4 A for OUT2, OUT3, and OUT4 SRF 0.14 0.2 0.28 0.4 0.4 0.4 0.8 0.8 0.8 0.8 1.6 1.6 V/ s Driver Output Matching Slew Rate (SRR /SRF) (70% to 30% @ VBAT = 14 V @25 °C) SR bit = 0: IOUT = 2.8 A for OUT1 and OUT5 and IOUT = 5.5 A for OUT2/3/4 SR bit = 1: IOUT = 0.7 A for OUT1 and OUT5 and IOUT = 1.4 A for OUT2/3/4 SR 0.8 0.8 1.0 1.0 1.2 1.2 Driver Output Turn-ON Delay (SPI ON Command [No PWM, CS Positive Edge] to Output = 50% VBAT @ VBAT = 14 V) (see Figure 6) SR bit = 0: IOUT = 2.8 A for OUT1 and OUT5 and IOUT = 5.5 A for OUT2/3/4 SR bit = 1: IOUT = 0.7 A for OUT1 and OUT5 and IOUT = 1.4 A for OUT2/3/4 tDLYON 65 35 – – 300 120 s Driver Output Turn-OFF Delay (SPI OFF command [CS Positive Edge] to Output = 50% VBAT @ VBAT = 14 V) (see Figure 6) SR bit = 0: IOUT = 2.8 A for OUT1 and OUT5 and IOUT = 5.5 A for OUT2/3/4 SR bit = 1: IOUT = 0.7 A for OUT1 and OUT5 and IOUT = 1.4 A for OUT2/3/4 tDLYOFF 40 15 – – 110 80 s Notes 37. Not production tested. See Figure 7, Current Sensing Time Delays. |
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