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CDCP1803MRGETEP 데이터시트(PDF) 12 Page - Texas Instruments

부품명 CDCP1803MRGETEP
상세설명  1:3 LVPECL CLOCK BUFFER WITH PROGRAMMABLE DIVIDER
PDF  24 Pages
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제조업체  TI1 [Texas Instruments]
홈페이지  http://www.ti.com
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CDCP1803MRGETEP 데이터시트(HTML) 12 Page - Texas Instruments

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PARAMETER MEASUREMENT INFORMATION
IN
IN
Y0
Y0
tpd(LH1)
Y1
Y1
tpd(LH2)
Y2
Y2
NOTES: A. Output skew, tsk(o), is calculated as the greater of:
− The difference between the fastest and the slowest tpd(LH)n (n = 0…2)
− The difference between the fastest and the slowest tpd(HL)n (n = 0…2)
B. Part-to-part skew, tsk(pp), is calculated as the greater of:
− The difference between the fastest and the slowest tpd(LH)n (n = 0…2 for LVPECL, n = 3 for LVCMOS) across multiple devices
− The difference between the fastest and the slowest tpd(HL)n (n = 0…2 for LVPECL, n = 3 for LVCMOS) across multiple devices
C. Pulse skew, tsk(p), is calculated as the magnitude of the absolute time difference between the high-to-low (tpd(HL) and the low-to-high
(tpd(LH)) propagation delays when a single switching input causes one or more outputs to switch, tsk(p) = | tpd(HL) − tpd(LH) |. Pulse skew
is sometimes referred to as pulse width distortion or duty cycle skew.
T0067-02
|Yn*Yn|
Yn
Yn
VOH
VOL
80%
20%
0 V
tr
tf
VOUT(pp)
T0058-02
PCB DESIGN FOR THERMAL FUNCTIONALITY
CDCP1803-EP
SCAS864 – DECEMBER 2008........................................................................................................................................................................................... www.ti.com
Figure 7. Waveforms for Calculation of tsk(o) and tsk(pp)
Figure 8. LVPECL Differential Output Voltage and Rise/Fall Time
It is recommended to take special care of the PCB design for good thermal flow from the QFN 24-terminal
package to the PCB.
Due to the three LVPECL outputs, the current consumption of the CDCP1803 is fixed.
JEDEC JESD51-7 specifies thermal conductivity for standard PCB boards.
12
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Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s) :CDCP1803-EP



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