GRAYCHIP, INC.

- 5 -

JUNE 22, 1998

GC3021 MIXER AND CARRIER REMOVAL CHIP

DATA SHEET

This document contains information which may be changed at any time without notice

out of the chip on the SO pin (See Section 4.2). The timing relationships between the data, HCK, HSI and

HSO are shown in Figure 3.

Figure 3. SYNC TIMING

The differential data inputs share pins with the I/Q complex data inputs. The I input pins are used

as the positive differential inputs and the Q pins are used as the negative differential inputs. Termination

resistors (70 Ohms) are provided on the chip which are connected between each input signal and the

VTERM termination voltage as shown in Figure 4.

Figure 4. DIFFERENTIAL INPUT

The positive and negative termination resistors can be independently turned off to allow the use of

external termination resistors. The differential voltage swing can be centered anywhere from VCC minus

3.5 volts to VCC minus 1 volt. The peak to peak differential swing can be as little as 0.5 volts. This is

intended to be compatible with PECL signal sources (ECL chips which have been connected between 5

volts and ground rather than from ground to minus 5 volts). The termination voltage for PECL logic should

be VCC minus 2 volts.

If single ended operation is desired, then the negative termination resistors should be turned off and

the unused pins forced to the middle voltage of the differential swing. The clock has independent termination

controls so that it can be differential while the data and sync are single ended. The VTERM voltage should

I/Q IN

XI OUT

XQ OUT

HCK

HSI

HCKO

HSO

x0

x1

x2

x3

x4

x0

x1

x2

x3

VTERM

NTERM_ON

PTERM_ON

POS_IN

NEG_IN

+

-

RCVR

ENABLE

OUT

70 Ohms

70 Ohms

NOTE:

Care must be taken to insure that the VTERM voltage is always

between VCC and ground, even during power up. The VTERM pins on the chip

may be destroyed if the VTERM voltage exceeds these limits.