SN8P1602AX datasheet(68/94 Pages) SONIX

68 / 94 page

SN8P1600

8-bit micro-controller

SONiX TECHNOLOGY CO., LTD

Page 68

Revision 1.94

INT0 (P0.0) INTERRUPT OPERATION

The INT0 has falling edge interrupt trigger. For SN8P1600, the INT0 just uses the falling edge to trigger the external

interrupt 0. When the INT0 trigger occurs, the P00IRQ will be set to “1” however the P00IEN is enable or disable. If the

P00IEN = 1, the trigger event sets the P00IRQ to be “1” and the system into interrupt vector (ORG 8). If the P00IEN =

0, the trigger event just only sets the P00IRQ to be “1” but the system doesn’t get into interrupt vector. Users need to

care the operation under multi-interrupt situation.

Example: INT0 interrupt request setup.

B0BSET

FP00IEN

; Enable INT0 interrupt service

B0BCLR

FP00IRQ

; Clear INT0 interrupt request flag

B0BSET

FGIE

; Enable GIE

Example: INT0 interrupt service routine.

ORG

; Interrupt vector

JMP

INT_SERVICE

INT_SERVICE:

B0XCH

A, ACCBUF

; Store ACC value.

B0MOV

A, PFLAG

B0MOV

PFLAGBUF, A

B0BTS1

FP00IRQ

; Check P00IRQ

JMP

EXIT_INT

; P00IRQ = 0, exit interrupt vector

B0BCLR

FP00IRQ

; Reset P00IRQ

; INT0 interrupt service routine

EXIT_INT:

B0MOV

A, PFLAGBUF

B0MOV

PFLAG, A

B0XCH

A, ACCBUF

; Restore ACC value.

RETI

; Exit interrupt vector

SN8P1602AX 데이터시트(PDF) 68 Page - SONiX Technology Company

SN8P1602AX 데이터시트(HTML) 68 Page - SONiX Technology Company

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94

데이터시트 다운로드

링크 URL