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TNETA1575PGC 데이터시트(PDF) 19 Page - Texas Instruments

부품명 TNETA1575PGC
상세설명  ATM SEGMENTATION AND REASSEMBLY DEVICE WITH PCI-HOST AND COPROCESSOR INTERFACES
PDF  45 Pages
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TNETA1575
ATM SEGMENTATION AND REASSEMBLY DEVICE
WITH PCI-HOST AND COPROCESSOR INTERFACES
SDNS040C – MAY 1996 – REVISED JUNE 1998
19
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
COP – interface full-indication signal
The COPI interface on the TNETA1575 provides a COPFULL input terminal that indicates when the traffic
coprocessor interface receive FIFOs are within one cell of filling up. The TNETA1575 reacts by deasserting the
UTOPIA receive enable signal (RESCLAV or RXENABLE, depending on whether PHY or ATM mode is
selected) according to the UTOPIA specification. After the COPFULL input terminal goes inactive low, the
TNETA1575 asserts the UTOPIA receive enable signal RESCLAV or RXENABLE, depending on whether PHY
or ATM mode is selected on the UTOPIA interface. If this terminal is not connected, the TNETA1575 operates
under normal conditions.
TNETA1575 / TNETA1585 interconnect
Figure 4 shows the interconnect of the TNETA1575 (SAR) and the TNETA1585 traffic cop, including information
on connection of the control-memory interface, the coprocessor interface, and the cell interfaces.
CTRL
ADDR
TNETA1575
8
SRAM
64K
× 32 or
32K
× 32
TNETA1585
DATA (31–0)
ADDRESS (15–0)
CMOE
CMWE
CMSELHI
LRESET
LINTR
TCCX
RCCX
DAX
COPFULL
Control Memory
Parameter Memory
SRAM
64K
× 32 or
32K
× 32
Figure 4. TNETA1575 Interconnect to TNETA1585



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