ThunderLAN

™ TNETE100

PCI ETHERNET

™ CONTROLLER

SINGLE-CHIP 10 BASE-T WITH MII FOR 100 BASE-T/100VG-AnyLAN

™

SPWS017B – APRIL 1995 – REVISED AUGUST 1996

15

POST OFFICE BOX 1443

electrical characteristics over recommended ranges of supply voltage (unless otherwise noted)

(physical interface pins) (continued)

AUI receiver input (ARCVP, ARCVN, ACOLP, ACOLN)

PARAMETER

JEDEC

SYMBOL

TEST CONDITIONS

MIN

MAX

UNIT

VSQ–

Falling input pair squelch threshold

– 325

mV

AUI transmitter drive characteristics (AXMTP, AXMTN)

PARAMETER

JEDEC

SYMBOL

TEST CONDITIONS

MIN

MAX

UNIT

VO(DIFF)1

Differential output voltage

VOD(1)

See Note 12

"500 "1315

mV

VOI(DIFF)

Output idle differential voltage†

VOD(IDLE)

"40†

mV

VOI(DIFF)U

Output differential undershoot‡

VOD(IDLE)U

100‡

mV

IO(FC)

Output current, fault condition ‡

IO(FC)

150‡

mA

† Assured by design

‡ Characterized but not tested

NOTE 12: The differential voltage is measured as per Figure 3(b) on page 17.

crystal oscillator characteristics

PARAMETER

JEDEC

SYMBOL

TEST CONDITIONS

MIN

MAX

UNIT

VSB(FXTL1) Input self-bias voltage

VIB

1.7

2.8

V

IOH(FXTL2)

High-level output current (see Note 4)

IOH

V(FXTL2) = VSB(FXTL1)

V(FXTL1) = VSB(FXTL1) + 0.5 V

– 1.3

– 5

mA

IOL(FXTL2)

Low-level output current

IOL

V(FXTL2) = VSB(FXTL1)

V(FXTL1) = VSB(FXTL1) – 0.5 V

0.4

1.5

mA

NOTE 4: The algebraic convention, where the more negative (less positive) limit is designated as a minimum, is used for logic-voltage levels only.