MMPF0100 datasheet(18/136 Pages) FREESCALE

18 / 136 page

Analog Integrated Circuit Device Data

Freescale Semiconductor

PF0100

Functional Block Requirements and Behaviors

Start-up

Functional Block Requirements and Behaviors

7.1

Start-up

The PF0100 can be configured to start-up from either the internal OTP configuration, or with a hard-coded configuration built in

to the device. The internal hard-coded configuration is enabled by connecting the VDDOTP pin to VCOREDIG through a

100kohm resistor. The OTP configuration is enabled by connecting VCOREDIG to GND.

For NP devices, selecting the OTP configuration causes the PF0100 to not start-up. However, the PF0100 can be controlled

through the I2C port for prototyping and programming. Once programmed, the NP device will startup with the customer

programmed configuration.

7.1.1

Device Start-up Configuration

Table 9 shows the Default Configuration which can be accessed on all devices as described above, as well as the pre-

programmed OTP configurations.

Table 9. Start-up Configuration

Registers

Default Configuration

Pre-programmed OTP Configuration

All Devices

Default I2C Address

0x08

VSNVS_VOLT

3.0 V

SW1AB_VOLT

1.375 V

SW1AB_SEQ

SW1C_VOLT

1.375 V

SW1C_SEQ

SW2_VOLT

3.0 V

3.3 V

3.15 V

SW2_SEQ

SW3A_VOLT

1.5 V

1.2 V

1.5 V

SW3A_SEQ

SW3B_VOLT

1.5 V

1.2 V

1.5 V

SW3B_SEQ

SW4_VOLT

1.8 V

3.15 V

1.8 V

SW4_SEQ

SWBST_VOLT

5.0 V

SWBST_SEQ

VREFDDR_VOLT

0.75 V

0.6 V

0.75 V

VREFDDR_SEQ

VGEN1_VOLT

1.5 V

1.2 V

VGEN1_SEQ

VGEN2_VOLT

1.5 V

VGEN2_SEQ

VGEN3_VOLT

2.5 V

VGEN3_SEQ

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