Integrated Silicon Solution, Inc. — www.issi.com

9

Rev. D

06/21/2011

1

2

3

4

5

6

7

8

9

10

11

12

IS61WV12816DALL/DALS, IS61WV12816DBLL/DBLS,

IS64WV12816DBLL/DBLS

-8

-10

-12

Symbol

Parameter

Min.

Max.

Min.

Max.

Min.

Max.

Unit

ReadCycleTime

8

—

10

—

12

—

ns

AddressAccessTime

—

8

—

10

—

12

ns

OutputHoldTime

2.0

—

2.0

—

3

—

ns

CEAccessTime

—

8

—

10

—

12

ns

OEAccessTime

—

5.5

—

6.0

—

6.0

ns

OEtoHigh-ZOutput

—

3

—

4

—

6

ns

OEtoLow-ZOutput

0

—

0

—

0

—

ns

CEtoHigh-ZOutput

0

3

0

4

0

6

ns

CEtoLow-ZOutput

3

—

3

—

3

—

ns

LB,UBAccessTime

—

5.5

—

6.5

—

6.5

ns

LB,UBtoHigh-ZOutput

0

5.5

0

6.5

0

6.5

ns

LB,UBtoLow-ZOutput

0

—

0

—

0

—

ns

PowerUpTime

0

—

0

—

0

—

ns

PowerDownTime

—

8

—

10

—

10

ns

Notes:

1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0V to

3.0V and output loading specified in Figure 1.

2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage.