STPM01_11 datasheet(18/60 Pages) STMICROELECTRONICS

18 / 60 page

Theory of operation

STPM01

18/60

Doc ID 10853 Rev 8

The maximum differential input voltage is dependent on the selected gain according to the

following table.

The gain register is included in the device configuration register with the address names

PST and ADDG. The table below shows the gain configuration according to the register

values:

Note:

If the device is used in configuration PST = 7 (primary channel with CT, secondary channel

with Shunt), the shunt Ks must always be equal to one fourth of the current transformer Ks.

Both the voltage and current channels implement an active offset correction architecture

which gives the benefit to avoid any offset compensation.

The analog voltage and current signals are processed by the

∑ Δ Analog to digital

converters that feed the hardwired DSP. The DSP implements an automatic digital offset

cancellation that make possible avoiding any manual offset calibration on the analog inputs.

Table 8.

Gain of voltage and current channels

Voltage channels

Current channels

Gain

Max Input voltage (V)

Gain

Max input voltage (V)

±0.30

±0.15

16X

±0.075

24X

±0.05

32X

±0.035

Table 9.

Configuration of current sensors

Primary

Secondary

Configuration Bits

Gain

Sensor

Gain

Sensor

PST (3 bits)

ADDG (1 bit)

Rogowsky Coil

Disabled (No Tamper)

8CT

Shunt

Rogowsky Coil

8CT6

Shunt

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