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WM8741 데이터시트(PDF) 16 Page - Wolfson Microelectronics plc |
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WM8741 데이터시트(HTML) 16 Page - Wolfson Microelectronics plc |
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16 / 64 page ![]() WM8741 Production Data w PD, Rev 4.2, October 2009 16 INTERNAL POWER ON RESET CIRCUIT The WM8741 includes two internal Power On Reset (POR) circuits which are used to reset the digital logic into a default state after power up and to allow the analogue circuits to power-up silently. The digital POR circuit is powered from DVDD. This circuit monitors DVDD and asserts the internal digital reset if DVDD are below the minimum DVDD threshold which will allow the digital logic to function. The analogue POR circuit is powered from AVDD. The circuit monitors AVDD, tri-stating the DAC outputs and isolating the internal reference resistor strings from AVDDL and AVDDR until there is sufficient AVDD voltage to allow the analogue DAC stages to function correctly. Figure 7 AVDD Power up Sequence Test Conditions AVDD = 5V, AGND = 0V, TA = +25 oC, TA_max = +125oC, TA_min = -25oC, AVDDmax = 5.5V, AVDDmin = 4.5V PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT Power Supply Input Timing Information AVDD level to POR rising edge (AVDD rising) Vpor_hi Measured from AGND 2.00 V AVDD level to POR falling edge (AVDD falling) Vpor_lo Measured from AGND 1.84 V Table 6 Analogue POR Timing |
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