WM8948ECSSLASHR datasheet(105/189 Pages) WOLFSON

105 / 189 page

Production Data

WM8948

PD, May 2011, Rev 4.1

105

The WM8948 operates as a slave device only. The controller indicates the start of data transfer with

a high to low transition on SDA while SCLK remains high. This indicates that a device ID, register

address and data will follow. The WM8948 responds to the start condition and shifts in the next eight

bits on SDA (7-bit device ID + Read/Write bit, MSB first). If the device ID received matches the

device ID of the WM8948, then the WM8948 responds by pulling SDA low on the next clock pulse

(ACK). If the device ID is not recognised or the R/W bit is ‘1’ when operating in write only mode, the

WM8948 returns to the idle condition and waits for a new start condition and valid address.

If the device ID matches the device ID of the WM8948, the data transfer continues as described

below. The controller indicates the end of data transfer with a low to high transition on SDA while

SCLK remains high. After receiving a complete address and data sequence the WM8948 returns to

the idle state and waits for another start condition. If a start or stop condition is detected out of

sequence at any point during data transfer (i.e. SDA changes while SCLK is high), the device returns

to the idle condition.

The WM8948 supports the following read and write operations:



Single write



Single read



Multiple write using auto-increment



Multiple read using auto-increment

The sequence of signals associated with a single register write operation is illustrated in Figure 39.

Figure 39 Control Interface 2-wire (I2C) Register Write

The sequence of signals associated with a single register read operation is illustrated in Figure 40.

Figure 40 Control Interface 2-wire (I2C) Register Read

The Control Interface also supports other register operations, as listed above. The interface protocol

for these operations is summarised below. The terminology used in the following figures is detailed in

Table 68.

Note that, for multiple write and multiple read operations, the auto-increment option must be enabled.

This feature is enabled by default, as noted in Table 67.

WM8948ECS/R 데이터시트(PDF) 105 Page - Wolfson Microelectronics plc