WM8351 datasheet(45/330 Pages) WOLFSON

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Production Data

WM8351

PD, April 2012, Rev 4.5

12 CLOCKING, TIMING AND SAMPLE RATES

12.1 GENERAL DESCRIPTION

The WM8351 includes clocking circuitry for the on-chip audio CODEC, the DC-DC converters and the

auxiliary ADC. It provides the following capabilities:

The WM8351 has two internal clock generators: a 2MHz RC oscillator and a 32kHz crystal oscillator.

Clocks are required for system start-up and also for the DC-DC converter clocks; these are derived

from the internal 2MHz RC oscillator. The 32kHz crystal oscillator (or external 32kHz source) is used

to drive the internal Real Time Clock (RTC), and may also be used as a reference source for the

CODEC clock generators.

The CODEC clocks may be derived either directly from MCLK, or else via an on-chip Frequency

Locked Loop (FLL) to generate the required clocking from a wide range of reference inputs. The FLL

can take as input the external MCLK, or ADCLRCLK / DACLRCLK (in Slave modes), or the 32kHz

crystal oscillator (or external 32kHz source), and generates (typically) a 12.288MHz clock for the

CODEC.

The flexible clocking arrangements are illustrated in Figure 33.

ADCLRCLK

12MHz Clock

to CODEC

(256fs)

ADC_CLKDIV

R68[2:0]

ADC Clock

2MHz FDC-DC DC-DC1, 3, 4

DAC Clock

DAC_CLKDIV

R54[2:0]

1MHz FDC-DC DC-DC2

÷ 2

MCLK_DIV,

R40[10:8]

OSC

32kHz (GPIOn)

PMU Core

Internal RC

Oscillator

DC-DC Clock

OSC_USER_TRIM,

R217[3:0]

To RTC

DACLRCLK

MCLK

32kHz (GPIOn)

fXTAL = 32.768kHz

FLL

÷ N

RTC_CLKSRC

R218[13]

MCLK_SEL

R40[11]

FLL_CLK_SRC

R45[1:0]

÷ 2

Figure 33 Clock Generation and Distribution Scheme

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