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AD9732/PCB 데이터시트(PDF) 9 Page - Analog Devices

부품명 AD9732/PCB
상세설명  10-Bit, 200 MSPS D/A Converter
PDF  11 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

AD9732/PCB 데이터시트(HTML) 9 Page - Analog Devices

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AD9732
–9–
REV. A
APPLICATION NOTES
THEORY OF OPERATION
The AD9732 high speed digital-to-analog converter utilizes most
significant bit decoding and segmentation techniques to reduce
glitch impulse and deliver high dynamic performance on lower
power consumption than previous bipolar DAC technologies.
The design is based on four main subsections: the decode/driver
circuits, the edge-triggered data register, the switch network and
the control amplifier. An internal bandgap reference is included
to allow operation of the device with minimum external support
components.
Digital Inputs/Timing
The AD9732 has PECL high speed single-ended inputs for data
inputs and clock. The switching threshold is +2.0 V.
In the decode/driver section, the three MSBs are decoded to
seven “thermometer code” lines. An equalizing delay is included
for the seven least significant bits and the clock signals. This
delay minimizes data skew and data setup-and-hold times at the
register inputs.
The on-board register is rising-edge triggered and should be
used to synchronize data to the current switches by applying a
pulse with proper data setup-and-hold times as shown in the
timing diagram. Although the AD9732 is designed to provide
isolation of the digital inputs to the analog output, some cou-
pling of digital transitions is inevitable. Digital feedthrough can
be minimized by forming a low-pass filter at the digital input by
using a resistor in series with the capacitance of each digital
input. This common high speed DAC application technique has
the effect of isolating digital input noise from the analog output.
References
The internal bandgap reference, control amplifier and reference
input are pinned out to provide maximum user flexibility in
configuring the reference circuitry for the AD9732. When using
the internal reference, REF OUT (Pin 25) should be connected
to CONTROL AMP IN (Pin 26). CONTROL AMP OUT (Pin
24) should be connected to REF IN (Pin 23). A 0.1
µF ceramic
capacitor connected from Pin 23 to GND improves settling time
by decoupling switching noise from the current sink baseline. A
reference current cell provides feedback to the control amplifier
by sinking current through RSET (Pin 17).
Full-scale current is determined by CONTROL AMP IN and
RSET according to the following equation:
IOUT(FS) = 32 ([CONTROL AMP IN – (+VS)]/RSET)
The internal reference is nominally –1.25 V (referenced to
Analog +VS), with a tolerance of ± 8% and typical drift over
temperature of 150 ppm/
°C. If greater accuracy or temperature
stability is required, an external reference can be used. The
AD589 reference features 10 ppm/
°C drift over the 0°C to
+70
°C temperature range.
Two modes of multiplying operation are possible with the
AD9732. Signals with bandwidths up to 2.5 MHz and input
swings from 3.8 V to 4.4 V can be applied to the CONTROL
AMP IN pin as shown in Figure 18. Because the control ampli-
fier is internally compensated, the 0.1
µF capacitor discussed
above can be reduced to maximize the multiplying bandwidth.
However, it should be noted that output settling time, for
changes in the digital word, will be degraded.
AD9732
RSET
CONTROL
AMP IN
CONTROL
AMP OUT
REFERENCE IN
RSET
RT
3.8V TO 4.4V
2.5MHz TYPICAL
0.1 F
+VS
Figure 18. Lower Frequency Multiplying Circuit
The REFERENCE IN pin can also be driven directly for wider
bandwidth multiplying operation. The analog signal for this
mode of operation must have a signal swing in the range of
0.95 V to 1.9 V. This can be implemented by capacitively cou-
pling into REFERENCE IN a signal with a dc bias of 1.9 V (IOUT
= 22.5 mA) to 0.95 V (IOUT = 3 mA), as shown in Figure 19, or
by dividing REFERENCE IN with a low impedance op amp
whose signal swing is limited to the stated range.
AD9732
REFERENCE IN
APPROX
1.4V
+VS
Figure 19. Wideband Multiplying Circuit
Analog Output
The switch network provides complementary current outputs
IOUT and IOUTB. The design of the AD9732 is based on statisti-
cal current source matching, which provides a 10-bit linearity
without trim. Current is steered to either IOUT or IOUTB in pro-
portion to the digital input word. The sum of the two currents is
always equal to the full-scale output current. The current can be
converted to a voltage by resistive loading as shown in Figure
20. Both IOUT and IOUTB should be equally loaded for best over-
all performance. The voltage that is developed is the product of
the output current and the value of the load resistor.
EVALUATION BOARD
The performance characteristics of the AD9732 make it ideally
suited for direct digital synthesis (DDS) and other waveform
synthesis applications. The AD9732 evaluation board provides a
platform for analyzing performance under optimum layout con-
ditions. The AD9732 also provides a reference for high speed
circuit board layout techniques.



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