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AD9732/PCB 데이터시트(PDF) 3 Page - Analog Devices

부품명 AD9732/PCB
상세설명  10-Bit, 200 MSPS D/A Converter
PDF  11 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

AD9732/PCB 데이터시트(HTML) 3 Page - Analog Devices

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–3–
REV. A
AD9732
Test
AD9732BRS
Parameter
Temp
Level
Min
Typ
Max
Units
SFDR PERFORMANCE (Wideband)
15
2 MHz AOUT
+25
°CV
66
dB
10 MHz AOUT
+25
°CV
63
dB
20 MHz AOUT
+25
°CV
57
dB
40 MHz AOUT
+25
°CV
52
dB
2 MHz AOUT (Clock = 165 MHz)
+25
°CV
63
dB
10 MHz AOUT (Clock = 165 MHz)
+25
°CV
62
dB
20 MHz AOUT (Clock = 165 MHz)
+25
°CV
56
dB
40 MHz AOUT (Clock = 165 MHz)
+25
°CV
51
dB
65 MHz AOUT (Clock = 165 MHz)
+25
°CV
48
dB
65 MHz AOUT (Clock = 200 MHz)
+25
°CV
45
dB
80 MHz AOUT (Clock = 200 MHz)
+25
°CV
43
dB
SFDR PERFORMANCE (Narrowband)15
2 MHz; 2 MHz Span
+25
°CV
77
dB
25 MHz; 2 MHz Span
+25
°CV
65
dB
10 MHz; 5 MHz Span (Clock = 200 MHz)
+25
°CV
70
dB
INTERMODULATION DISTORTION16
F1 = 800 kHz, F2 = 900 kHz to Nyquist
+25
°CV
69
dB
F1 = 800 kHz, F2 = 900 kHz, Narrowband
(2 MHz)
+25
°CV
61
dB
NOTES
1Measured as an error in ratio of full-scale current to current through R
SET (640 µA nominal); ratio is nominally 32. DAC load is virtual ground.
2Internal reference voltage is tested under load conditions specified in Internal Reference Output Current specification.
3Internal reference output current defines load conditions applied during Internal Reference Voltage test.
4Full-scale current variations among devices are higher when driving REFERENCE IN directly.
5Frequency at which a 3 dB change in output of DAC is observed; R
L = 50 Ω; 100 mV modulation at midscale.
6Based on I
FS = 32 ([CONTROL AMP IN – (+VS)]/RSET) when using internal control amplifier. DAC load is virtual ground.
7Measured as voltage settling at midscale transition to 0.1%; R
L = 50 Ω.
8Measured from 50% point of rising edge of CLOCK signal to 1/2 LSB change in output signal.
9Peak glitch impulse is measured as the largest area under a single positive or negative transient.
10Measured with R
L = 50 Ω and DAC operating in latched mode.
11Data must remain stable for a specified time prior to rising edge of CLOCK.
12Data must remain stable for a specified time after rising edge of CLOCK.
13Supply voltages should remain stable with
±5% for nominal operation.
14Power dissipation calculation includes current through a 50
Ω load.
15SFDR is defined as the difference in signal energy between the full-scale fundamental signal and worst case spurious frequencies in the output spectrum window.
The frequency span dc to Nyquist unless otherwise noted.
16Intermodulation distortion is the measure of the sum and difference products produced when a two-tone input is driven into the DAC. The distortion products
created will manifest themselves at sum and difference frequencies of the two tones.
Specifications subject to change without notice.
EXPLANATION OF TEST LEVELS
Test Level
I
100% production tested.
II 100% production tested at +25
°C and sample tested at
specified temperatures.
III Sample tested only.
IV Parameter is guaranteed by design and characterization
testing.
V
Parameter is a typical value only.
VI 100% production tested at +25
°C; guaranteed by design
and characterization testing for industrial temperature
range.
ORDERING GUIDE
Temperature
Package
Package
Model
Range
Description
Option
AD9732BRS
–40
°C to +85°C
28-Lead Small Outline (SSOP)
RS-28
AD9732/PCB
+25
°C
Evaluation Board



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