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ADF4116 데이터시트(PDF) 12 Page - Analog Devices

부품명 ADF4116
상세설명  RF PLL Frequency Synthesizers
PDF  20 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

ADF4116 데이터시트(HTML) 12 Page - Analog Devices

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ADF4116/ADF4117/ADF4118
–12–
REV. 0
Table IV. Reference Counter Latch Map
R14
0
0
0
0
•
•
•
1
1
1
1
R13
0
0
0
0
•
•
•
1
1
1
1
R12
0
0
0
0
•
•
•
1
1
1
1
R3
R2
R1
DIVIDE RATIO
••••••••••
••••••••••
••••••••••
••••••••••
••••••••••
••••••••••
••••••••••
••••••••••
••••••••••
••••••••••
••••••••••
••••••••••
0
0
0
1
•
•
•
1
1
1
1
0
1
1
0
•
•
•
0
0
1
1
1
0
1
0
•
•
•
0
1
0
1
1
2
3
4
•
•
•
163 80
163 81
163 82
163 83
TEST MODE BITS SHOULD
BE SET TO 0000 FOR
NORMAL OPERATION
OPERATION
LDP
3 CONSECUTIVE CYCLES OF PHASE DELAY LESS THAN
15ns MUST OCCUR BEFORE LOCK DETECT IS SET.
5 CONSECUTIVE CYCLES OF PHASE DELAY LESS THAN
15ns MUST OCCUR BEFORE LOCK DETECT IS SET.
0
1
TEST
MODE BITS
DB20
DB19
DB18
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
DB10
LDP
T4
T3
T2
T1
R14
R13
R12
R11
R10
R8
R7
R6
R5
R4
R3
R2
R1
C2 (0)
C1 (0)
R9
14-BIT REFERENCE COUNTER, R
CONTROL
BITS



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