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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ADM8690 데이터시트(PDF) 2 Page - Analog Devices |
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ADM8690 데이터시트(HTML) 2 Page - Analog Devices |
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2 / 16 page  ADM8690–ADM8695–SPECIFICATIONS Parameter Min Typ Max Units Test Conditions/Comments BATTERY BACKUP SWITCHING VCC Operating Voltage Range ADM8690, ADM8691, ADM8694, ADM8695 4.75 5.5 V ADM8692, ADM8693 4.5 5.5 V VBATT Operating Voltage Range ADM8690, ADM8691, ADM8694, ADM8695 2.0 4.25 V ADM8692, ADM8693 2.0 4.0 V VOUT Output Voltage VCC – 0.005 VCC – 0.0025 V IOUT = 1 mA VCC – 0.2 VCC – 0.125 V IOUT ≤ 100 mA VOUT in Battery Backup Mode VBATT – 0.005 VBATT – 0.002 V IOUT = 250 µA, VCC < VBATT – 0.2 V Supply Current (Excludes IOUT) 140 200 µAI OUT = 100 µA Supply Current in Battery Backup Mode 0.4 1 µAV CC = 0 V, VBATT = 2.8 V Battery Standby Current 5.5 V > VCC > VBATT + 0.2 V (+ = Discharge, – = Charge) –0.1 +0.02 µAT A = +25°C Battery Switchover Threshold 70 mV Power-Up VCC – VBATT 50 mV Power-Down Battery Switchover Hysteresis 20 mV BATT ON Output Voltage 0.3 V ISINK = 3.2 mA BATT ON Output Short Circuit Current 55 mA BATT ON = VOUT = 4.5 V Sink Current 0.5 2.5 25 µA BATT ON = 0 V Source Current RESET AND WATCHDOG TIMER Reset Voltage Threshold ADM8690, ADM8691, ADM8694, ADM8695 4.5 4.65 4.73 V ADM8692, ADM8693 4.25 4.4 4.48 V Reset Threshold Hysteresis 40 mV Reset Timeout Delay ADM8690, ADM8691, ADM8692, ADM8693 35 50 70 ms OSC SEL = HIGH ADM8694, ADM8695 140 200 280 ms OSC SEL = HIGH Watchdog Timeout Period, Internal Oscillator 1.0 1.6 2.25 s Long Period 70 100 140 ms Short Period Watchdog Timeout Period, External Clock 3840 4064 4097 Cycles Long Period 768 1011 1025 Cycles Short Period Minimum WDI Input Pulse Width 50 ns VIL = 0.4, VIH = 3.5 V RESET Output Voltage @ VCC = +1 V 4 20 mV ISINK = 10 µA, VCC = 1 V RESET, LOW LINE Output Voltage 0.05 0.4 V ISINK = 1.6 mA, VCC = 4.25 V 3.5 V ISOURCE = 1 µA RESET, WDO Output Voltage 0.4 V ISINK = 1.6 mA 3.5 V ISOURCE = 1 µA Output Short Circuit Source Current 1 10 25 µA Output Short Circuit Sink Current 25 mA WDI Input Threshold Note 1 Logic Low 0.8 V Logic High 3.5 V WDI Input Current 1 10 µA WDI = VOUT –10 –1 µA WDI = 0 V POWER FAIL DETECTOR PFI Input Threshold 1.25 1.3 1.35 V VCC = +5 V PFI Input Current –25 ±0.01 +25 nA PFO Output Voltage 0.4 V ISINK = 3.2 mA 3.5 V ISOURCE = 1 µA PFO Short Circuit Source Current 1 3 25 µA PFI = Low, PFO = 0 V PFO Short Circuit Sink Current 25 mA PFI = High, PFO = VOUT CHIP ENABLE GATING CEIN Threshold 0.8 V VIL 3.0 V VIH CEIN Pull-Up Current 3 µA CEOUT Output Voltage 0.4 V ISINK = 3.2 mA VOUT – 1.5 V ISOURCE = 3.0 mA VOUT – 0.05 V ISOURCE = 1 µA, V CC = 0 V CE Propagation Delay 3 7 ns REV. 0 –2– (VCC = Full Operating Range, VBATT = +2.8 V, TA = TMIN to TMAX unless otherwise noted) |
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