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ADV601LC 데이터시트(PDF) 28 Page - Analog Devices

부품명 ADV601LC
상세설명  Ultralow Cost Video Codec
PDF  44 Pages
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제조업체  AD [Analog Devices]
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ADV601LC 데이터시트(HTML) 28 Page - Analog Devices

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ADV601LC
–28–
REV. 0
APPLYING THE ADV601LC
This section includes the following topics:
• Using the ADV601LC in computer applications
• Using the ADV601LC in standalone applications
• Configuring the host interface for 6- or 32-bit data paths
• Connecting the video interface to popular video encoders and
decoders
• Getting the most out of the ADV601LC
The following Analog Devices products should be considered in
ADV601LC designs:
• ADV7175/ADV7176—Digital YUV to analog composite
video encoder
• AD722—Analog RGB to analog composite video encoder
• AD1843—Audio codec with embedded video synchronization
• ADSP-21xx—Family of fixed-point digital signal processors
• AD8xxx—Family of video operational amplifiers
Using the ADV601LC in Computer Applications
Many key features of the ADV601LC were driven by the demand-
ing cost and performance requirements of computer applications.
The following ADV601LC features provide key advantages in
computer applications:
• Host Interface
The 512 double word FIFO provides necessary buffering of
compressed digital video to deal with PCI bus latency.
• Low Cost External DRAM
Unlike many other real-time compression solutions, the
ADV601LC does not require expensive external SRAM
transform buffers or VRAM frame stores.
A2
A3
D0–D7
D8–D15
D16–D23
D24–D31
A28
A29
A30
A31
DECODE1
DECODE2
VCLK
VDATA [0–7]
LLC
XTAL
SAA7111
27MHz PAL OR NTSC
ADR0
ADR1
DQ0–DQ7
DQ8–DQ15
DQ16–DQ23
DQ24–DQ31
CS
STATS_R
LCODE
24.576MHz
XTAL
A0–A8
D0–D15
A0–A8
DQ1–DQ16
NOTE:
DECODE1 ASSERTS CS
~ ON THE
ADV601LC FOR HOST ADDRESSES
0X4000,0000 THROUGH
0X4000,0013
ADV601LC
HOST BUS
DRAM
(256K
16-BIT)
COMPOSITE VIDEO INPUT
VCLKO
TOSHIBA TC514265DJ/DZ/DFT-60
NEC
PD424210ALE-60
NEC
PD42S4210ALE-60
HITACHI
HM514265CJ-60
ANY DRAM USED WITH THE ADV601LC
MUST MEET THE MINIMUM SPECIFICATIONS
OUTLINED FOR THE HYPER MODE DRAMS
LISTED
FIFO_SRQ
FIFO_STP
FIFO_ERR
Y[0–7]
DECODE2 IS HOST SPECIFIC
BE0–BE1
BE2–BE3
RD
WR
HIRQ
ACK
RAS
CAS
WE
RAS
CAS
OE
WEL
WEH
RD
WR
Figure 13. A Suggested PC Application Design



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