| 전자부품 데이터시트 검색엔진 |
|
ORLI10G 데이터시트(PDF) 13 Page - Agere Systems |
|
|
|||||||||||||||||||||||||||||
ORLI10G 데이터시트(HTML) 13 Page - Agere Systems |
|
13 / 72 page ![]() Agere Systems Inc. 13 Data Sheet October 2001 10 Gbits/s, and 12.5 Gbits/s Line Interface FPSC ORCA ORLI10G Quad 2.5 Gbits/s ORLI10G Overview (continued) 1018(F) Figure 1. ORCA ORLI10G Block Diagram EMBEDDED CORE FPGA LOGIC (400K GATES) TRANSMIT PLLs REFERENCE CLOCK TRANSMIT DATA 16 x 622 OR 16 x 645 OR 16 x 667 OR 64:16 MUX OR 128:16 MUX TRANSMIT CLOCK RECEIVE PLLs 16:64 DEMUX OR 16:128 DEMUX RECEIVE DATA 16 x 622 OR 16 x 645 OR 16 x 667 OR FOUR 2.5 Gbit RXCLKs 64-bit OR 128-bit RXCLK 64-bit OR 128-bit TXCLK (167 MHz—78 MHz) (167 MHz—78 MHz) SYSTEM INTERFACE: — POS-PHY 4 — XGMII — 156 MHz PECL (OC-48/STM-16 SONET/SDH) — USER DEFINED 16 x 781 Mbits/s 16 x 781 Mbits/s 2 2 |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |