ORLI10G datasheet(41/72 Pages) AGERE

41 / 72 page

Agere Systems Inc.

Data Sheet

October 2001

10 Gbits/s, and 12.5 Gbits/s Line Interface FPSC

ORCA ORLI10G Quad 2.5 Gbits/s

LVDS Buffer Characteristics

Termination Resistor

The LVDS drivers and receivers operate on a 100

Ω differential impedance, as shown below. External resistors are

not required. The differential driver and receiver buffers include termination resistors inside the device package, as

shown in Figure 23.

5-8703(F)

Figure 23. LVDS Driver and Receiver and Associated Internal Components

LVDS Driver Buffer Capabilities

Under worst-case operating condition, the LVDS driver must withstand a disabled or unpowered receiver for an

unlimited period of time without being damaged. Similarly, when its outputs are short-circuited to each other or to

ground, the LVDS driver will not suffer permanent damage. Figure 24 illustrates the terms associated with LVDS

driver and receiver pairs.

5-8704(F)

Figure 24. LVDS Driver and Receiver

5-8705(F)

Figure 25. LVDS Driver

LVDS DRIVER

Ω

LVDS RECEIVER

CENTER TAP

DEVICE PINS

100

Ω

EXTERNAL

VGPD

VOA

VOB

VIA

VIB

DRIVER

INTERCONNECT

RECEIVER

VOA

VOB

RLOAD

VOD = (VOA – VOB)

ORLI10G 데이터시트(PDF) 41 Page - Agere Systems

ORLI10G 데이터시트(HTML) 41 Page - Agere Systems

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72

데이터시트 다운로드

링크 URL