| 전자부품 데이터시트 검색엔진 |
|
ADAU1977WBCPZ-R7 데이터시트(PDF) 51 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADAU1977WBCPZ-R7 데이터시트(HTML) 51 Page - Analog Devices |
|
51 / 64 page ![]() Data Sheet ADAU1977 Rev. A | Page 51 of 64 HIGH-PASS FILTER AND DC OFFSET CONTROL REGISTER AND MASTER MUTE Address: 0x0E, Reset: 0x02, Name: MISC_CONTROL Table 40. Bit Descriptions for MISC_CONTROL Bits Bit Name Settings Description Reset Access [7:6] SUM_MODE Channel Summing Mode Control for Higher SNR. 0x0 RW 00 Normal 4-Channel Operation 01 2-Channel Summing Operation (See the ADC Summing Modes Section) 10 1-Channel Summing Operation (See the ADC Summing Modes Section) 11 Reserved 5 RESERVED Reserved. 0x0 RW 4 MMUTE Master Mute. 0x0 RW 0 Normal Operation 1 All Channels Muted [3:1] RESERVED Reserved. 0x1 RW 0 DC_CAL DC Calibration Enable. 0x0 RW 0 Normal Operation 1 Perform DC Calibration |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |