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STM32F050C4 데이터시트(PDF) 71 Page - STMicroelectronics

부품명 STM32F050C4
상세설명  Low- and medium-density advanced ARM-based 32-bit MCU with up to 32 Kbytes Flash, timers, ADC and comm. interfaces
PDF  97 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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STM32F050C4 데이터시트(HTML) 71 Page - STMicroelectronics

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STM32F050xx
Electrical characteristics
Doc ID 023683 Rev 1
71/97
Figure 22.
I/O AC characteristics definition
6.3.14
NRST pin characteristics
The NRST pin input driver uses CMOS technology. It is connected to a permanent pull-up
resistor, RPU (see Table 45: I/O static characteristics).
Unless otherwise specified, the parameters given in Table 48 are derived from tests
performed under ambient temperature and VDD supply voltage conditions summarized in
Table 15: General operating conditions.
Figure 23.
Recommended NRST pin protection
1.
The reset network protects the device against parasitic resets.
2.
The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in
Table 48. Otherwise the reset will not be taken into account by the device.
ai14131
10%
90%
50%
tr(IO)out
OUTPUT
EXT ERNAL
ON 50pF
Maximum fr equency is achieved if (tr + tf) £ 2/3)T and if the duty cycle is (45-55%)
10%
50%
90%
when loaded by 50pF
T
tr(IO)out
Table 48.
NRST pin characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIL(NRST)
(1)
1.
Guaranteed by design, not tested in production.
NRST input low level voltage
–0.3
-
0.8
V
VIH(NRST)
(1)
NRST input high level voltage
2
-
VDD+0.3
Vhys(NRST)
NRST Schmitt trigger voltage
hysteresis
-
200
-
mV
RPU
Weak pull-up equivalent resistor(2)
2.
The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution
to the series resistance must be minimum
(~10% order)
.
VIN = VSS
25
40
55
k
Ω
VF(NRST)
(1)
NRST input filtered pulse
-
-
100
ns
VNF(NRST)
(1)
NRST input not filtered pulse
300
-
-
ns



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