LSM303DLHCTR datasheet(16/42 Pages) STMICROELECTRONICS

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Application hints

LSM303DLHC

16/42

Doc ID 018771 Rev 1

Application hints

Figure 4.

LSM303DLHC electrical connection

4.1

capacitors

The C1 and C2 external capacitors should be low SR value ceramic type constructions (typ.

suggested value 200 mOhm). Reservoir capacitor C1 is nominally 4.7 µF in capacitance,

with the set/reset capacitor C2 nominally 0.22

µF in capacitance.

The device core is supplied through the Vdd line. Power supply decoupling capacitors

(C4=100 nF ceramic, C3=10 µF Al) should be placed as near as possible to the supply pin

of the device (common design practice). All the voltage and ground supplies must be

present at the same time to have proper behavior of the IC (refer to

Figure 4).

The functionality of the device and the measured acceleration/magnetic field data is

selectable and accessible through the I2C interface.

The functions, the threshold, and the timing of the two interrupt pins (INT 1 and INT 2) can

be completely programmed by the user through the I2C interface.

4.2

Pull-up resistors

Pull-up resistors (suggested value 10 kOhm) are placed on the two I2C bus lines.

TOP VIEW

Vdd_IO

C1=4.7uF

GND

C2=0.22uF

Vdd

C4 = 100nF

C3 = 10uF

Digital signal from/to signal controller.Signals levels are defined by proper selection of Vdd

Vdd I2C bus

Rpu

10kOhm

TOP VIEW

AM09239V1

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