PCF8574TSLASH3 datasheet(17/33 Pages) NXP

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PCF8574_PCF8574A

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Product data sheet

Rev. 5 — 27 May 2013

17 of 33

NXP Semiconductors

PCF8574; PCF8574A

Remote 8-bit I/O expander for I2C-bus with interrupt

14. Dynamic characteristics

[1]

All the timing values are valid within the operating supply voltage and ambient temperature range and refer to VIL and VIH with an input

voltage swing of VSS to VDD.

Table 10.

Dynamic characteristics

VDD = 2.5 V to 6 V; VSS =0V; Tamb = 40 C to +85 C; unless otherwise specified.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

I2C-bus timing[1] (see Figure 17)

fSCL

SCL clock frequency

100

kHz

tBUF

bus free time between a STOP and

START condition

4.7

s

tHD;STA

hold time (repeated) START condition

s

tSU;STA

set-up time for a repeated START condition

4.7

s

tSU;STO

set-up time for STOP condition

s

tHD;DAT

data hold time

tVD;DAT

data valid time

3.4

s

tSU;DAT

data set-up time

250

tLOW

LOW period of the SCL clock

4.7

s

tHIGH

HIGH period of the SCL clock

s

rise time of both SDA and SCL signals

s

fall time of both SDA and SCL signals

0.3

s

Port timing (see Figure 8 and Figure 9)

tv(Q)

data output valid time

CL  100 pF

s

tsu(D)

data input set-up time

CL  100 pF

s

th(D)

data input hold time

CL  100 pF

s

Interrupt INT timing (see Figure 9)

tv(INT)

valid time on pin INT

from port to INT;

CL  100 pF

s

trst(INT)

reset time on pin INT

from SCL to INT;

CL  100 pF

s

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