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STM8S005K6 데이터시트(PDF) 82 Page - STMicroelectronics |
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STM8S005K6 데이터시트(HTML) 82 Page - STMicroelectronics |
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82 / 103 page ![]() Unit Max Min Conditions Parameter Symbol ns tSCK/2 + 15 tSCK/2 - 15 Master mode SCK high and low time tw(SCKH) (1) tw(SCKL) (1) ns 5 Master mode Data input setup time tsu(MI) (1) tsu(SI) (1) ns 5 Slave mode Data input setup time ns 7 Master mode Data input hold time th(MI) (1) th(SI) (1) ns 10 Slave mode Data input hold time ns 3 x tMASTER Slave mode Data output access time ta(SO) (1) (2) ns 25 Slave mode Data output disable time tdis(SO) (1) (3) ns 73 Slave mode (after enable edge) Data output valid time tv(SO) (1) ns 36 Master mode (after enable edge) Data output valid time tv(MO) (1) ns 28 Slave mode (after enable edge) Data output hold time th(SO) (1) ns 12 Master mode (after enable edge) th(MO) (1) (1) Values based on design simulation and/or characterization results, and not tested in production. (2) Min time is for the minimum time to drive the output and the max time is for the maximum time to validate the data. (3) Min time is for the minimum time to invalidate the output and the max time is for the maximum time to put the data in Hi-Z. DocID022186 Rev 3 82/103 STM8S005K6 STM8S005C6 Electrical characteristics |
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