33FJ128GP708 datasheet(78/90 Pages) MICROCHIP

78 / 90 page

dsPIC33F

DS70155C-page 76

Preliminary

TABLE B-2:

dsPIC33F MOTOR CONTROL FAMILY VARIANTS (DEVICES MARKED “PS”)

U1CTS

U1RTS

U1RX

U1TX

U2CTS

U2RTS

U2RX

U2TX

—

UART1 clear to send.

UART1 ready to send.

UART1 receive.

UART1 transmit.

UART2 clear to send.

UART2 ready to send.

UART2 receive.

UART2 transmit.

VDD

—

Positive supply for peripheral logic and I/O pins.

VDDCORE

—

CPU logic filter capacitor connection.

VSS

—

Ground reference for logic and I/O pins.

VREF+

Analog

Analog voltage reference (high) input.

VREF-

Analog

Analog voltage reference (low) input.

TABLE B-1:

PINOUT I/O DESCRIPTIONS FOR MOTOR CONTROL FAMILY (CONTINUED)

Pin Name

Type

Buffer

Type

Description

Legend:

CMOS = CMOS compatible input or output; Analog = Analog input

ST = Schmitt Trigger input with CMOS levels; O = Output; I = Input; P = Power

Device

Pins

Program

Flash

Memory

(KB)

RAM

(KB)(1)

Packages

33FJ128MC706

128

8 ch

2 A/D,

16 ch

33FJ128MC708

128

8 ch

2 A/D,

18 ch

33FJ256MC710

100

256

8 ch

2 A/D,

24 ch

Note

RAM size is inclusive of 1 KB DMA RAM.

Maximum I/O pin count includes pins shared by the peripheral functions.

Note:

Prototype samples are intended for dsPIC33F early adopters and are based on early revision silicon. Devices

are marked with “PS” suffix. Major differences are noted in this data sheet. For additional information, please

refer to the

“dsPIC33F Data Sheet”.

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