MPC8314EEC datasheet(13/101 Pages) FREESCALE

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MPC8314E PowerQUICC II Pro Processor Hardware Specifications, Rev. 2

Freescale Semiconductor

Clock Input Timing

This table shows the estimated typical I/O power dissipation for this family of devices.

Clock Input Timing

This section provides the clock input DC and AC electrical characteristics for the MPC8314E.

Table 5. MPC8314E Power Dissipation

Interface

Frequency

GVDD

(1.8 V)

GVDD

(2.5 V)

NVDD

(3.3 V)

LVDD1_OFF/

LVDD2_ON

(3.3V)

LVDD2

_ON

(3.3V)

VDD33PLL,

VDD33ANA

(3.3V)

SATA_VDD,

VDD1IO,

VDD1ANA

(1.0V)

XCOREVDD,

XPADVDD,

SDAVDD

(1.0V)

Unit

DDR 1

Rs = 22



Rt = 50



266MHz,

32 bits

—0.323

—

200MHz,

32 bits

—0.291

—

DDR 2

Rs = 22



Rt = 75



266MHz,

32 bits

0.246

—

200MHz,

32bits

0.225

—

PCI I/O

load = 50pF

33 MHz

—

0.120

—

66 MHz

—

0.249

—

Local bus I/O

load = 20pF

66 MHz

———

—

0.056

—

50 MHz

———

—

0.040

—

eTSEC I/O

load = 20pF

Multiple by

number of

interface

used

MII, 25MHz

—

0.008

—

RGMII,

125MHz

(3.3V)

—

0.078

—

RGMII,

125MHz

(2.5V)

—

0.044

—

USBDR

Controller

(ULPI mode)

load =20pF

60 MHz

—

0.078

—

USBDR+

Internal PHY

(UTMI mode)

480 MHz

—

0.274

—

PCI Express

two x1lane

2.5 GHz

—

0.190

Other I/O

—

0.015

—

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