SCA720-D01

Murata Electronics Oy

10/13

www.muratamems.fi

Doc. nr. 82171500

Rev.A

The self-test generates an electrostatic force, deflecting the sensing element’s proof mass, thus

checking the complete signal path. The true self test performs following checks:

•

Sensing element movement check

•

ASIC signal path check

•

PCB signal path check

•

Micro controller A/D and signal path check

The created deflection can be seen in analogue output. Self test can be activated applying logic”1”

(positive supply voltage level) to ST pin (pin 9) of SCA720. The self test Input high voltage level is

4 – Vdd+0.3 V and input low voltage level is 0.3 – 1 V.

Figure 7. Self test wave forms.

V1 = initial output voltage before the self test function is activated.

V2 = output voltage during the self test function.

V3 = output voltage after the self test function has been de-activated and after stabilization time

Please note that the error band specified for V3 is to guarantee that the output is within 5% of the

initial value after the specified stabilization time. After a longer time (max. 1 second) V1=V3.

T1 = Pulse length for Self test activation

T2 = Saturation delay

T3 = Recovery time

T4 = Stabilization time =T2+T3

T5 = Rise time during self test.

T1 [ms]

T2 [ms]

T3 [ms]

T4 [ms]

T5 [ms]

V2:

V3:

10-100

Typ. 20

Typ. 50

Typ. 70

Typ. 10

Min 0.95*VDD

(4.75V @Vdd=5V)

0.95*V1-

1.05*V1

Self test characteristics.

Vout

5V

0 V

T1

T2

T3

T4

V1

V2

V3

ST pin

voltage

0 V

5 V

T5