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EP3CLS200 데이터시트(PDF) 13 Page - Altera Corporation |
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EP3CLS200 데이터시트(HTML) 13 Page - Altera Corporation |
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13 / 274 page ![]() CIII51001-2.4 © 2012 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as trademarks or service marks are the property of their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services. Cyclone III Device Handbook Volume 1 July 2012 Subscribe ISO 9001:2008 Registered 1. Cyclone III Device Family Overview Cyclone® III device family offers a unique combination of high functionality, low power and low cost. Based on Taiwan Semiconductor Manufacturing Company (TSMC) low-power (LP) process technology, silicon optimizations and software features to minimize power consumption, Cyclone III device family provides the ideal solution for your high-volume, low-power, and cost-sensitive applications. To address the unique design needs, Cyclone III device family offers the following two variants: ■ Cyclone III—lowest power, high functionality with the lowest cost ■ Cyclone III LS—lowest power FPGAs with security With densities ranging from about 5,000 to 200,000 logic elements (LEs) and 0.5 Megabits (Mb) to 8 Mb of memory for less than ¼ watt of static power consumption, Cyclone III device family makes it easier for you to meet your power budget. Cyclone III LS devices are the first to implement a suite of security features at the silicon, software, and intellectual property (IP) level on a low-power and high-functionality FPGA platform. This suite of security features protects the IP from tampering, reverse engineering and cloning. In addition, Cyclone III LS devices support design separation which enables you to introduce redundancy in a single chip to reduce size, weight, and power of your application. This chapter contains the following sections: ■ “Cyclone III Device Family Features” on page 1–1 ■ “Cyclone III Device Family Architecture” on page 1–6 ■ “Reference and Ordering Information” on page 1–12 Cyclone III Device Family Features Cyclone III device family offers the following features: Lowest Power FPGAs ■ Lowest power consumption with TSMC low-power process technology and Altera® power-aware design flow ■ Low-power operation offers the following benefits: ■ Extended battery life for portable and handheld applications ■ Reduced or eliminated cooling system costs ■ Operation in thermally-challenged environments ■ Hot-socketing operation support July 2012 CIII51001-2.4 |
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