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MPC8247VRTMFA 데이터시트(PDF) 25 Page - Freescale Semiconductor, Inc

부품명 MPC8247VRTMFA
상세설명  PowerQUICC II Family Hardware Specifications
PDF  61 Pages
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제조업체  FREESCALE [Freescale Semiconductor, Inc]
홈페이지  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8247VRTMFA 데이터시트(HTML) 25 Page - Freescale Semiconductor, Inc

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MPC8272 PowerQUICC II Family Hardware Specifications, Rev. 3
Freescale Semiconductor
25
AC Electrical Characteristics
This figure shows signal behavior in MEMC mode.
Figure 10. MEMC Mode Diagram
NOTE
Generally, all SoC bus and system output signals are driven from the rising
edge of the input clock (CLKin). Memory controller signals, however,
trigger on four points within a CLKin cycle. Each cycle is divided by four
internal ticks: T1, T2, T3, and T4. T1 always occurs at the rising edge, and
T3 at the falling edge, of CLKin. However, the spacing of T2 and T4
depends on the PLL clock ratio selected, as shown in Table 14.
This table is a representation of the information in Table 14.
Figure 11. Internal Tick Spacing for Memory Controller Signals
Table 14. Tick Spacing for Memory Controller Signals
PLL Clock Ratio
Tick Spacing (T1 Occurs at the Rising Edge of CLKin)
T2
T3
T4
1:2, 1:3, 1:4, 1:5, 1:6
1/4 CLKin
1/2 CLKin
3/4 CLKin
1:2.5
3/10 CLKin
1/2 CLKin
8/10 CLKin
1:3.5
4/14 CLKin
1/2 CLKin
11/14 CLKin
CLKin
V_CLK
Memory controller signals
sp34/sp30
CLKin
T1
T2
T3
T4
CLKin
T1
T2
T3
T4
for 1:2.5
for 1:3.5
CLKin
T1
T2
T3
T4
for 1:2, 1:3, 1:4, 1:5, 1:6



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