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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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AM3703CUS 데이터시트(PDF) 138 Page - Texas Instruments |
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AM3703CUS 데이터시트(HTML) 138 Page - Texas Instruments |
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138 / 280 page  AM3715, AM3703 SPRS616F – JUNE 2010 – REVISED AUGUST 2011 www.ti.com 4.2 Output Clocks Specifications 4.2.1 sys_clkout1 Output Clock Table 4-10 summarizes the sys_clkout1 ouput clock electrical characteristics. Table 4-10. sys_clkout1 Output Clock Electrical Characteristics NAME DESCRIPTION MIN TYP MAX UNIT f Frequency, sys_clkout1 sys_xtalin / sys_xtalout clock frequency MHz SC[0:1] = 00(1) CL Load capacitance (transmission line load + far end load) 4 60 pF ZT Transmission line impedance 30 70 Ω LT Transmission line length 2 20 cm SC[0:1] = 01(1) CL Load capacitance (transmission line load + far end load) 7 33 pF ZT Transmission line impedance 30 70 Ω LT Transmission line length 2 8 cm SC[0:1] = 10(1) CL Load capacitance (transmission line load + far end load) 2 21 pF ZT Transmission line impedance 30 70 Ω LT Transmission line length 1 6 cm (1) The mode is configured by bits SC0 and SC1 of the IO cell. For more details, see the AM/DM37x Multimedia Device Technical Reference Manual (SPRUGN4). Table 4-11 details the sys_clkout1 ouput clock switching characteristics. Table 4-11. sys_clkout1 Output Clock Switching Characteristics(6) NAME DESCRIPTION MIN TYP MAX UNIT CO0 1 / tc(CLKOUT1) Frequency, sys_clkout1 sys_xtalin/sys_xtalout clock frequency MHz SC[0:1] = 00(1) CL Load capacitance 4 60 pF tJ Peak-to-peak jitter X(5) + 693 ps tJC2C Cycle-to-cycle jitter X(5) + 705 ps tW(CLKOUT1) Pulse duration, sys_clkout1 low or high 0.45*tc(CLKOUT 0.55*tc(CLKOUT 1) 1) tR(CLKOUT1) Rise time, sys_clkout1 1(2) (4) 15(3) ns tF(CLKOUT1) Fall time, sys_clkout1 1(2) (4) 15(3) ns SC[0:1] = 01(1) CL Load capacitance 7 33 pF tJ Peak-to-peak jitter X(5) + 543 ps tJC2C Cycle-to-cycle jitter X(5) + 555 ps tW(CLKOUT1) Pulse duration, sys_clkout1 low or high 0.45*tc(CLKOUT 0.55*tc(CLKOUT 1) 1) tR(CLKOUT1) Rise time, sys_clkout1 0.6(2) (4) 7(3) ns tF(CLKOUT1) Fall time, sys_clkout1 0.6(2) (4) 7(3) ns SC[0:1] = 10(1) CL Load capacitance 2 21 pF tJ Peak-to-peak jitter X(5) + 603 ps tJC2C Cycle-to-cycle jitter X(5) + 615 ps tW(CLKOUT1) Pulse duration, sys_clkout1 low or high 0.47*tc(CLKOUT 0.53*tc(CLKOUT 1) 1) tR(CLKOUT1) Rise time, sys_clkout1 0.4(2) (4) 5(3) ns 138 Clock Specifications Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): AM3715 AM3703 |
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