TLE2082ACDR datasheet(64/79 Pages) TI1

64 / 79 page

TLE208x, TLE208xA, TLE208xY

EXCALIBUR HIGH-SPEED JFET-INPUT

OPERATIONAL AMPLIFIERS

SLOS182B – FEBRUARY 1997 – REVISED JUNE 2001

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

APPLICATION INFORMATION

input characteristics

The TLE208x, TLE208xA, and TLE208xB are specified with a minimum and a maximum input voltage that if

exceeded at either input could cause the device to malfunction. Because of the extremely high input impedance

and resulting low bias current requirements, the TLE208x, TLE208xA, and TLE208xB are well suited for

low-level signal processing; however, leakage currents on printed-circuit boards and sockets can easily exceed

bias current requirements and cause degradation in system performance. It is good practice to include guard

rings around inputs (see Figure 74). These guards should be driven from a low-impedance source at the same

voltage level as the common-mode input.

–

+ R2

Where

Figure 74. Use of Guard Rings

TLE2081 input offset voltage nulling

The TLE2061 series offers external null pins that can be used to further reduce the input offset voltage. The

circuit of Figure 75 can be connected as shown if the feature is desired. When external nulling is not needed,

the null pins may be left unconnected.

–

VCC –

100 k

Ω

5 k

Ω

IN –

IN +

OUT

Figure 75. Input Offset Voltage Nulling

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