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AD9142BCPZ 데이터시트(PDF) 21 Page - Analog Devices |
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AD9142BCPZ 데이터시트(HTML) 21 Page - Analog Devices |
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21 / 65 page ![]() Data Sheet AD9142 Rev. 0 | Page 21 of 64 LVDS Input Level Requirements There are two types of LVDS receivers in the AD9142. The 16-bit data bus and the frame input share the same LVDS receiver design. The DCI uses a different LVDS design. The main difference between the two LVDS receivers is the required input differential swing level. The data bus and frame receiver require a minimum of ±100 mV swing at the input. The DCI receiver requires a minimum of ±225 mV swing at its input. Figure 35 shows the LVDS input configuration and the required swing levels. Because the DCI is typically generated from the same bank as the data in the data source, it is recommended that the output swing of the LVDS driver be larger than the required DCI input level, thus meeting both input data and DCI requirements. Figure 35. Data Interface Voltage Swing Requirements 1.32V +225mV –225mV 0V 1.1V DCIP DCI DCIN AD9142 DCI INPUT LVDS LEVEL 1.25V +100mV –100mV 0V 1.15V DnP Dn DnN AD9142 DATA AND FRAME INPUT LVDS LEVEL DnN DnP Dn AD9142 LVDS INPUT CONFIGURATION + – + – DCIN DCIP DCI GND GND AD9142 TO INTERNAL DIGITAL TO INTERNAL DIGITAL VCM = (VINP + VINN)/2 = 1.2V 100Ω 100Ω DATA RECEIVER DCI RECEIVER |
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