Analog Integrated Circuit Device Data



Freescale Semiconductor

41

07XSC200

The GCR register disables the overvoltage protection (D0). When this bits is [0], the overvoltage is enabled (default value).

5.4.2.6

Address 00111—Calibration Register (CALR)

The CALR register allows the MCU to calibrate internal clock, as explained in Figure 13.

5.4.3

Serial Output Communication (Device Status Return Data)

dependent upon the previously written SPI word.

Any bits clocked out of the Serial Output (SO) pin after the first 16 bits will be representative of the initial message bits clocked

message verification.

into the appropriate registers. A valid message length is a multiple of 16 bits. At this time, the SO pin is tri-stated and the fault

status register is now able to accept new fault status information.

SO data will represent information ranging from fault status to register contents, user selected by writing to the STATR bits OD4,

OD3, OD2, OD1, and OD0. The value of the previous bit SOA3 will determine which output the SO information applies to for the

registers which are output specific; viz., Fault, PWMR, CONFR0, CONFR1, and OCR registers.

Note that the SO data will continue to reflect the information for each output that was selected during the most recent STATR

write until changed with an updated STATR write.

logic [0] during SPI communication, and/or for the period of time since the last valid SPI communication, with the following

exception:

• The previous SPI communication was determined to be invalid. In this case, the status will be reported as though the invalid

SPI communication never occurred

5.4.4

Serial Output Bit Assignment

The 16 bits of serial output data depend on the previous serial input message, as explained in the following paragraphs. Table 22,

summarizes SO returned data for bits OD15:OD0.

• Bit OD15 is the MSB; it reflects the state of the watchdog bit from the previously clocked-in message

• Bits OD14:OD10 reflect the state of the bits SOA4:SOA0 from the previously clocked in message

• Bit OD9 is set to logic [1] in Normal mode (NM)

• The contents of bits OD8:OD0 depend on bits D4:D0 from the most recent STATR command SOA4:SOA0 as explained

in the paragraphs following Table 22

Table 20. CSNS Reporting Selection

TEMP_en (D5) CSNS_en (D4)

CSNS reporting

0

0

CSNS tri-stated (default)

X

1

current recopy of selected output (D3:2]

bits)

1

0

temperature on GND flag

Table 21. Output Current Recopy Selection

CSNS1 (D3)

CSNS0 (D2)

CSNS reporting

10

HS0

11

HS1