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4816P-R2R-503 데이터시트(PDF) 55 Page - Bourns Electronic Solutions |
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4816P-R2R-503 데이터시트(HTML) 55 Page - Bourns Electronic Solutions |
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55 / 62 page ![]() Specifications are subject to change without notice. 331 Use Bourns Networks To: • Match impedance between memory driver and the DRAM array. • Minimize reflections and ringing in DRAM inputs. • Prevent undershoot of RAS, CAS, and WE signals which may result in latch-up of DRAM inputs • Improve system performance by allowing faster setting times for DRAM inputs. Need For Damping The address lines (RAS, CAS) and control lines (WE) of dynamic RAM arrays are driven in parallel, causing significant loading on the driver of the DRAM arrays. Each DRAM control input (WE) has capacitive loading between 5pF to 7pF, while each address line input has about a 10pF load. Thus each DRAM input can be modeled as a transmission line with distributed inductance and capacitance. If not properly ter- minated, signal reflections and ringing on the line will result, adversely affecting the performance of the memory system. The effects on signal transitions will be: 1. Increased settling time delay on low-to-high transitions. 2. Voltage undershoot on high-to-low transitions. Increased settling time due to ringing reduces system perfor- mance because the design has to allow for the settling delay before sampling the signal. Undershoot, by bringing the input voltage below 0 volts, can damage the driver IC as well as alter the DRAM’s internal address register contents, causing potential loss of data. SYSTEM DATA BUS TIMING CONTROLLERS CPU ADDRESS DYNAMIC MEMORY CONTROL ADDRESS RAS CAS WE DYNAMIC MEMORY ARRAY BLOCK DIAGRAM OF DRAM SYSTEM EFFECT OF DAMPING RESISTOR WITHOUT DAMPING RESISTOR WITH DAMPING RESISTOR Courtesy of B. Narasimhan and J. Shaffer, Micron Techology Corporation. t1 t2 1 V "HIGH" LOGIC LEVEL COMPARISON OF UNDERSHOOTS WITHOUT DAMPING RESISTOR WITH DAMPING RESISTOR t1 - TIME TO ACCEPTABLE "LOW" LOGIC LEVEL FOR DRIVER WITHOUT DAMPING RESISTOR t2 - TIME TO ACCEPTABLE "LOW" LOGIC LEVEL WITHDAMPING RESISTOR DRAM Applications |
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