MPC8548ECPXATHC datasheet(56/151 Pages) FREESCALE

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MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 9

Freescale Semiconductor

I2C

13 I2C

This section describes the DC and AC electrical characteristics for the I2C interfaces of the device.

13.1

I2C DC Electrical Characteristics

This table provides the DC electrical characteristics for the I2C interfaces.

13.2

I2C AC Electrical Specifications

This table provides the AC timing parameters for the I2C interfaces.

Table 45. I2C DC Electrical Characteristics

Parameter

Symbol

Min

Max

Unit

Notes

Input high voltage level

VIH

0.7

 OV

OVDD +0.3

—

Input low voltage level

VIL

–0.3

0.3

 OV

V—

Low level output voltage

VOL

00.2

 OV

Pulse width of spikes which must be suppressed by the

input filter

tI2KHKL

050

Input current each I/O pin (input voltage is between

0.1

 OV

DD and 0.9  OVDD(max)

–10

A3

Capacitance for each I/O pin

—10

—

Notes:

1. Output voltage (open drain or open collector) condition = 3 mA sink current.

2. See the MPC8548E PowerQUICC™ III Integrated Processor Family Reference Manual, for information on the digital filter

used.

3. I/O pins obstruct the SDA and SCL lines if OVDD is switched off.

Table 46. I2C AC Electrical Specifications

Parameter

Symbol1

Min

Max

Unit

Notes

SCL clock frequency

fI2C

0400

kHz

—

Low period of the SCL clock

tI2CL

1.3

—

s4

High period of the SCL clock

tI2CH

0.6

—

s4

Setup time for a repeated START condition

tI2SVKH

0.6

—

s4

Hold time (repeated) START condition (after this period,

the first clock pulse is generated)

tI2SXKL

0.6

—

s4

Data setup time

tI2DVKH

100

—

Data input hold time:

CBUS compatible masters

I2C bus devices

tI2DXKL

—

s2

Data output delay time:

tI2OVKL

—0.9

—

Set-up time for STOP condition

tI2PVKH

0.6

—

s—

Bus free time between a STOP and START condition

tI2KHDX

1.3

—

s—

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