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AD7225LP 데이터시트(PDF) 3 Page - Analog Devices

부품명 AD7225LP
상세설명  LC2MOS Quad 8-Bit DAC with Separate Reference Inputs
PDF  24 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

AD7225LP 데이터시트(HTML) 3 Page - Analog Devices

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AD7225
Rev. C | Page 3 of 24
SPECIFICATIONS
VDD = 11.4 V to 16.5 V, VSS = −5 V ± 10%; AGND = DGND = 0 V; VREFx = +2 V to (VDD − 4 V)1
Parameter
, unless otherwise noted. All specifications
TMIN to TMAX, unless otherwise noted.
Table 1.
K, B
Versions2
L, C
Versions2
Unit
Conditions/Comments
STATIC PERFORMANCE
Resolution
8
8
Bits
Total Unadjusted Error
±2
±1
LSB max
VDD = 15 V ± 5%, VREF = 10 V
Relative Accuracy
±1
±1/2
LSB max
Differential Nonlinearity
±1
±1
LSB max
Guaranteed monotonic
Full-Scale Error
±1
±1/2
LSB max
Full-Scale Temperature Coefficient
±5
±5
ppm/°C typ
VDD = 14 V to 16.5 V, VREF = 10 V
Zero Code Error
±30
±20
mV max
Zero Code Error Temperature Coefficient
±30
±30
μV/°C typ
REFERENCE INPUT
Voltage Range
2 to (VDD − 4)
2 to (VDD − 4)
V min to V max
Input Resistance
11
11
kΩ min
Input Capacitance3
50
50
pF max
Occurs when each DAC is loaded with all 1s
Channel-to-Channel Isolation3
60
60
dB min
VREF = 10 V p-p sine wave at 10 kHz
AC Feedthrough3
−70
−70
dB max
VREF = 10 V p-p sine wave at 10 kHz
DIGITAL INPUTS
Input High Voltage, VINH
2.4
2.4
V min
Input Low Voltage, VINL
0.8
0.8
V max
Input Leakage Current
±1
±1
μA max
VIN = 0 V or VDD
Input Capacitance3
8
8
pF max
Input Coding
Binary
Binary
DYNAMIC PERFORMANCE
Voltage Output Slew Rate3
2.5
2.5
V/μs min
Voltage Output Settling Time3
4
4
μs max
VREF = 10 V; settling time to ±½ LSB
Digital Feedthrough3
50
50
nV sec typ
Code transition all 0s to all 1s
Digital Crosstalk3
50
50
nV sec typ
Code transition all 0s to all 1s
Minimum Load Resistance
2
2
kΩ min
VOUT = 10 V
POWER SUPPLIES
VDD Range
11.4/16.5
11.4/16.5
V min to V max
For specified performance
IDD
10
10
mA max
Outputs unloaded; VIN = VINL or VINH
ISS
9
9
mA max
Outputs unloaded; VIN = VINL or VINH
SWITCHING CHARACTERISTICS3, 4
t1
50
50
ns min
Write pulse width
t2
0
0
ns min
Address to write setup time
t3
0
0
ns min
Address to write hold time
t4
50
50
ns min
Data valid to write setup time
t5
0
0
ns min
Data valid to write hold time
t6
50
50
ns min
Load DAC pulse width
1
Maximum possible reference voltage.
2
Temperature range is as follows for all versions: −40°C to +85°C.
3
Sample tested at 25°C to ensure compliance.
4
Switching characteristics apply for single-supply and dual-supply operation.



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