ADG1208/ADG1209

Rev. B | Page 9 of 20

1

2

3

4

5

6

7

8

16

15

14

13

12

EN

S1A

S2A

A0

GND

S1B

S2B

A1

ADG1209

TOP VIEW

(Not to Scale)

11

10

9

S4A

S3A

S4B

DA

DB

S3B

PIN 1

INDICATOR

1

2

S1A

3

S2A

4

S3A

11 S1B

10 S2B

9S3B

TOP VIEW

(Not to Scale)

ADG1209

Figure 5. ADG1209 Pin Configuration (TSSOP/SOIC)

Figure 6. ADG1209 Pin Configurations (LFCSP_VQ),

Table 6. ADG1209 Pin Function Descriptions

Pin Number

TSSOP/SOIC

LFCSP_VQ

Mnemonic

Description

1

15

A0

Logic Control Input.

2

16

EN

Active High Digital Input. When low, the device is disabled and all switches are off.

When high, Ax logic inputs determine on switches.

3

1

Most Negative Power Supply Potential. In single-supply applications, it can be

connected to ground.

4

2

S1A

Source Terminal 1A. Can be an input or an output.

5

3

S2A

Source Terminal 2A. Can be an input or an output.

6

4

S3A

Source Terminal 3A. Can be an input or an output.

7

5

S4A

Source Terminal 4A. Can be an input or an output.

8

6

DA

Drain Terminal A. Can be an input or an output.

9

7

DB

Drain Terminal B. Can be an input or an output.

10

8

S4B

Source Terminal 4B. Can be an input or an output.

11

9

S3B

Source Terminal 3B. Can be an input or an output.

12

10

S2B

Source Terminal 2B. Can be an input or an output.

13

11

S1B

Source Terminal 1B. Can be an input or an output.

14

12

Most Positive Power Supply Potential.

15

13

GND

Ground (0 V) Reference.

16

14

A1

Logic Control Input.

Table 7. ADG1209 Truth Table

A1

A0

EN

On Switch Pair

X

X

0

None

0

0

1

1

0

1

1

2

1

0

1

3

1

1

1

4