AM7968-125JC datasheet(66/127 Pages) AMD

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TAXIchip Integrated Circuits Technical Manual

common mode range. The average DC value of the input signal is therefore relatively

unimportant.

There are three broad classes of TAXl-to-media interface:

1. Very short (<3

″ link length), usually DC coupled.

2. Terminated, DC coupled.

3. Terminated, AC coupled.

The short link is typical of a TAXIchip set to optical components connection. The

terminated cases are used for driving cables, also optical or other components with

incompatible power supply and/or logic level requirements may sometimes need circuits

and layout that exceed 3

″.

5.1 Very Short Link, DC Coupled

For DC coupled inter-connections in which the distance between the serial pins and the

next device is less than 3

″, transmission line terminations are not necessary. All that is

required is an appropriate PECL pull-down resistor, RE. Elimination of reflections is not

required for these short line lengths because the round-trip propagation is significantly

less than the 2 ns TAXIchip set rise and fall time. The effect of media mismatch in this

case is distortion and slowing of the transition due to the addition of the reflection to the

still changing edge.

Figure 5-1a

Standard Load Circuit

VOH = 4.1 V

VCC –2 V = 3 V

IOH

Ω

12330E-7

Figure 5-1b

Pull-Down with IOH Matched to Standard Load

IOH

VOH = 4.1 V

12330E-8

The lower limit for RE is that value which produces the maximum value of lOH. In a

standard PECL load circuit (Figure 5-1a) lOH max is given by:

(VOH – (VCC –2))/50 = (4.1–3)/50 = 22 mA

If we return RE to ground instead of 3 V (Figure 5-1b), the minimum value of RE

becomes 4.1 V/22 mA, or 186

Ω.

Reflections due to mismatch can be minimized by locating the pull-down resistor at the

end of the line, rather than the source. A mismatched line termination will give a

reflection coefficient less than one while leaving the end of the line open will give a

reflection coefficient of one (maximum reflection). Note that the supply voltage and logic

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