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AM79C940VCW 데이터시트(PDF) 111 Page - Advanced Micro Devices |
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AM79C940VCW 데이터시트(HTML) 111 Page - Advanced Micro Devices |
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111 / 122 page ![]() AMD 111 Am79C940 16235C-46 SRDCLK SRD SF/BD Byte 66 (Data Byte 53) EAR Byte 64 (Data Byte 51) Byte 65 (Data Byte 52) 91 85 89 86 BIT 0 BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7 BIT 0 BIT 5 BIT 6 BIT 7 BIT 4 BIT 1 EADI Feature Reject Timing 16235C-47 STDCLK TXDAT+ TXEN RXCRS 72 73 20 21 19 18 17 71 70 Note 1 Note: During transmit, the RXCRS input must be asserted (high) and remain active-high after TXEN goes active (high). If RXCRS is deasserted before TXEN is deasserted, LCAR will be reported (Transmit Frame Status) after the transmission is completed by the MACE device. GPSI Transmit Timing |
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