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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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AM79C974 데이터시트(PDF) 35 Page - Advanced Micro Devices |
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AM79C974 데이터시트(HTML) 35 Page - Advanced Micro Devices |
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35 / 153 page  P R E L I M I N A R Y AMD 35 Am79C974 Basic Burst Read Cycles All Am79C974 controller burst read transfers are of the PCI command type Memory Read Line (type14). AD[1:0] will both be ZERO during the address phase in- dicating a linear burst order. All four byte enable signals will be ZERO during the data phase as the Am79C974 controller always reads a full 32-bit word when in burst mode. Figure 9 shows a typical burst read access. The Am79C974 controller arbitrates for the bus, is granted access, and reads four 32-bit words (DWORD) from system memory and then releases the bus. All four data phases in this example take two clock cycles each, which is determined by the timing of TRDY. 18681A-13 FRAME CLK AD IRDY TRDY C/ BE DEVSEL REQ GNT 12345678 ADDR 0000 1110 11 10 9 12 PAR PAR DATA DATA DATA DATA PAR PAR PAR PAR DEVSEL is sampled by the Am79C974 controller. 13 Figure 9. Burst Read Cycles |
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