AM79C984 datasheet(22/44 Pages) AMD

22 / 44 page

P R E L I M I N A R Y

Am79C984A

Command/Response Timing

Figure 6 shows the command/response timing. At the

end of a GET command, the eIMR device waits two

SCLK cycles and then transmits the response on SO.

Figure 6. Control Get Command/Response

Control Commands

The following section details the operation of each con-

trol commands available in the eIMR device. In all

cases, the individual bits in each command are shown

with the most-signiﬁcant bit (bit 7) on the left and the

least-signiﬁcant bit (bit 0) on the right. Table 4 and Table

5 show a summary of default states and a summary of

control commands, respectively.

Note: Data is transmitted and received on the serial

data lines least-signiﬁcant bit ﬁrst and most-signiﬁcant

bit last.

ST D0 D1 D2 D3 D4 D5 D6 D7

SCLK

ST D0 D1 D2 D3 D4 D5 D6 D7

20650A-11

20650B-11

Table 4. Summary of Default States after Reset

eIMR Programmable Option—S Off

AUI Partitioning Algorithm

Normal

TP Partitioning Algorithm

Normal

AUI/TP Port

Enabled

Link Test

Enabled

Link Pulse

Enabled

Automatic Receiver Polarity

Reversal

State of SI at reset

Extended Distance Mode

Disabled

Blink Rate

Off

Software Override of LEDs

Disabled

AM79C984 데이터시트(PDF) 22 Page - Advanced Micro Devices

AM79C984 데이터시트(HTML) 22 Page - Advanced Micro Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44

데이터시트 다운로드

링크 URL