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W25Q40BL

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7.2.27 Erase / Program Suspend (75h)

The Erase/Program Suspend instruction “75h”, allows the system to interrupt a Sector or Block Erase

operation or a Page Program operation and then read from or program/erase data to, any other sectors or

blocks. The Erase/Program Suspend instruction sequence is shown in figure 25.

The Write Status Register instruction (01h) and Erase instructions (20h, 52h, D8h, C7h, 60h, 44h) are not

allowed during Erase Suspend. Erase Suspend is valid only during the Sector or Block erase operation. If

written during the Chip Erase operation, the Erase Suspend instruction is ignored. The Write Status

Suspend. Program Suspend is valid only during the Page Program or Quad Page Program operation. A

maximum of time of “tSUS” (See AC Characteristics) is required to suspend the erase or program

operation. The BUSY bit in the Status Register will clear to 0 and the SUS bit in the Status Register will be

set to 1 after Erase/Program Suspend.

Unexpected power off during the Erase/Program suspend state will reset the device and release the

suspend state. SUS bit in the Status Register will also reset to 0. The data within the page, sector or block

that was being suspended may become corrupted. It is recommended for the user to implement system

design techniques against the accidental power interruption and preserve data integrity during

erase/program suspend state.

Figure 25. Erase/Program Suspend Instruction Sequence

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